Hex calculator

What this calculator is for

The binary converter and the number base converter change how one number is written. This page does arithmetic and bit manipulation on numbers of a fixed width, the way a processor register does: add, subtract, multiply and divide, the bitwise AND, OR, XOR and NOT, negation, logical and arithmetic shifts and rotations, at 8, 16, 32 or 64 bits, read as unsigned numbers or as signed two’s complement numbers. For each result it shows the hexadecimal, unsigned and signed decimal, binary and octal forms, the bytes in big-endian and little-endian order, and, where they mean something, the carry and overflow flags. Arithmetic is exact: it uses big integers, so a 64-bit product is not rounded.

Widths and ranges

In two’s complement the sign bit is worth −2^(N−1), so the signed range is −2^(N−1) to 2^(N−1) − 1 and the pattern of all ones is −1. Every pattern is both an unsigned and a signed number; the calculator keeps the bits the same and shows both readings.

How each operation is defined

Addition and subtraction work on the bit patterns modulo 2^N. The carry flag is set when the unsigned result does not fit (a carry out of the top bit for addition, a borrow for subtraction) and the overflow flag when the signed result does not fit, the definitions of CF and OF in Intel’s manual. Multiplication keeps the low N bits and reports whether the full product needed more. Signed division truncates toward zero and the remainder takes the sign of the dividend, so that quotient × divisor + remainder equals the dividend (ISO C, §6.5.5). A left shift fills with zeros and a logical right shift fills with zeros; an arithmetic right shift copies the sign bit. A shift count of N or more is rejected, because ISO C leaves it undefined. A rotation moves the bits that fall off one end back in at the other.

Worked examples

0xFFFFFFFF + 1 at 32 bits is 0x00000000: carry yes, signed overflow no. In the signed view 0x7FFFFFFF + 1 is 0x80000000, which reads as −2,147,483,648: signed overflow yes, carry no. At 8 bits 0x00 − 0x01 is 0xFF with a borrow (carry yes), and 0x80 − 0x01 in the signed view gives 0x7F (−128 − 1 does not fit: overflow yes). 0xFFFFFFFF × 0xFFFFFFFF keeps 0x00000001; the full product is 0xFFFFFFFE00000001. Masks: 0xA5 AND 0x0F = 0x05, and NOT 0xA5 = 0x5A. The 8-bit pattern 0x81 rotated left by 1 is 0x03. To pull the green channel out of the color #FF6A2B, shift 0xFF6A2B right by 8 and AND with 0xFF: the result is 0x6A, or 106; the color converter does the same split for you.

A signed 32-bit overflow you may meet in 2038

A count of seconds since the Unix epoch held in a signed 32-bit integer reaches its largest value, 0x7FFFFFFF, on 2038-01-19 03:14:07 UTC; one second later the next value wraps to −2,147,483,648. That is the same overflow as the second worked example. To see what a timestamp means as a date, use the Unix timestamp converter.

Common mistakes

Forgetting the width: 0xFF is 255 at 8 bits and 255 at 16 bits unsigned, but −1 at 8 bits signed and still 255 at 16 bits signed. Reading a decimal entry as bits, or the reverse: decimal entries are values, hexadecimal ones are patterns. Expecting a right shift to equal division for negative numbers: −9 shifted right by two is −3, but −9 divided by 4 truncates to −2. Mixing up carry and overflow, which differ for the same operation. Shifting by the full width or more, which hardware and the C standard treat in their own ways. And pasting C code behavior into a register model: C promotes small operands before computing and treats signed overflow as undefined.

How do I add hexadecimal numbers?

Add column by column from the right, as in decimal, but carry when a column reaches 16 instead of 10, with A to F standing for 10 to 15. For example 0xFF + 0x01: F + 1 = 16, which is 0 with a carry of 1; the next F + 0 + 1 is again 16, so the result is 0x100. In a fixed width the carry out of the top is lost: as 8-bit numbers 0xFF + 0x01 gives 0x00 and the carry flag is set. The calculator shows the result in hexadecimal, decimal, binary and octal, so you can check a sum in any base.

What is two's complement, and why is 0xFF equal to −1?

Two’s complement is the way processors store signed integers: the top bit counts as −2^(N−1) instead of +2^(N−1) (ISO C, N1570 §6.2.6.2, lists it as one of the allowed representations; Intel’s manual says all operations on signed integers assume it). In 8 bits, 0xFF is 1111 1111 = −128 + 127 = −1, and 0x80 is the smallest number, −128. To negate a number, flip all its bits and add one: ~0x01 + 1 = 0xFE + 1 = 0xFF. In the signed view the calculator reads a hexadecimal, binary or octal entry as the bit pattern, so FF means −1 at 8 bits; a decimal entry is read as the value, so −1 gives FF.

What is the difference between the carry flag and the overflow flag?

They answer different questions about the same addition or subtraction. Intel’s manual defines the carry flag (CF) as set when an operation generates a carry or a borrow out of the most significant bit, which signals overflow for unsigned numbers; the overflow flag (OF) is set when the signed result is too large or too small to fit, which signals overflow for two’s complement numbers. So 0xFFFFFFFF + 1 in 32 bits sets the carry (the unsigned sum 4,294,967,296 does not fit) but not the overflow (signed it is −1 + 1 = 0), while 0x7FFFFFFF + 1 sets the overflow (2,147,483,647 + 1 does not fit in a signed 32-bit number) but not the carry. The result bits are identical in both views.

What is the difference between logical and arithmetic right shift?

A logical shift (SHR) fills the vacated top bits with zeros; an arithmetic shift (SAR) copies the sign bit, so a negative number stays negative. Shifting right by n bits divides by 2^n, but the two shifts round differently from ordinary division. Intel’s instruction reference notes that for −9 and 4, signed division gives −2 with remainder −1 (rounded toward zero), while an arithmetic right shift of −9 by two bits gives −3 (rounded toward negative infinity). ISO C’s division also discards the fraction, but its right shift of a negative number is implementation-defined (N1570 §6.5.7). The calculator offers SAR, SHR and SHL as separate operations and reports the last bit shifted out.

How do I write a negative number in hexadecimal?

Choose the width first, because the digits depend on it: −1 is 0xFF in 8 bits, 0xFFFF in 16 bits and 0xFFFFFFFF in 32 bits. The pattern is 2^N − 1, or in general 2^N plus the negative number: −9 in 8 bits is 256 − 9 = 247 = 0xF7. Select the signed view, enter the decimal number −9 with decimal as the input base, and read 0xF7 in the result. Binary and octal work the same way. The smallest value of each width has no positive twin: −128 at 8 bits, whose negation is itself.

What happens on overflow in C, and does the calculator match it?

For unsigned types, C defines wrap-around: a result that cannot be represented is reduced modulo one more than the largest value (N1570 §6.2.5, paragraph 9), which is what the calculator shows. For signed types, a result outside the range is an “exceptional condition” and the behavior is undefined (§6.5, paragraph 5), and a left shift that overflows a signed value is undefined too (§6.5.7); the calculator shows the wrapped bits that a processor would produce and flags the overflow instead. C also promotes narrow operands to a wider type before it computes (§6.5.7 for shifts), so an 8-bit variable in C does not wrap the way an 8-bit register does. This page models a fixed-width register, not C’s type rules.

Sources: ISO/IEC 9899 working draft N1570 (C11, April 12, 2011), sections 6.2.5 paragraph 9, 6.2.6.2, 6.5 paragraph 5, 6.5.5 paragraph 6 and 6.5.7; Intel 64 and IA-32 Architectures Software Developer’s Manual, volume 1 (order number 253665-060US, September 2016), sections 3.4.3.1 (status flags), 4.2.1.2 (signed integers) and 7.3.6.1 (shift instructions), and volume 2, the SAL/SAR/SHL/SHR entry (read in the c9x.me reproduction of the instruction reference). Related: binary converter, number base converter, color converter, Unix timestamp converter and subnet calculator for the bit arithmetic behind masks.